1. Field of the Invention
The present invention generally relates to a method for fabricating titanium silicide of MOS devices, and more particularly, in accordance with the trend of narrow line width, the thickness of titanium silicide is increased effectively for reducing its sheet resistance.
2. Description of the Prior Art
In semiconductor fabrication of integrated circuits, suicides are normally used as the material for interconnection to overcome the inherent shortcomings of polysilicon. The major shortcoming of polysilicon is its minimum sheet resistance of about 10 ohms per square. Silicides are materials formed by the reaction of a refractory metal or a near-noble metal with silicon. Due to the characteristic of low sheet resistivity of silicides, it has become the practice to provide a silicide layer over polysilicon for improving the fabrication of large scale integration. Furthermore, silicides can also reduce the size of interconnection and the line width of gate electrodes, hence, achieving the requirement of very large scale integration.
An increment in device integrity makes the resistance of MOS device source/drain regions gradually climb up and almost equal to the resistance of MOS device channel. In order to reduce the sheet resistance of source/drain regions and to guarantee a complete shallow junction between metal and MOS devices, the application of a "Self Aligned Silicide" process is gradually steeping into the VLSI fabrication of 0.5 .mu.m and below. This particular process is called Salicide for short.
Titanium is the most common used metallic material for the current salicide process (others include platinum, cobalt, etc.). Basically, titanium is a fine oxygen gettering material, where under an appropriate temperature titanium and silicon at MOS device source/drain and gate regions are easily mutually diffused to form a titanium silicide with very low resistance.
In fact, under the trend of developing highly integrated devices, the resistance of titanium silicide and the line width have an enormous relationship, in particular when the line width of MOS transistors is smaller than 0.3 .mu.m. An even more obvious trend in the rising of sheet resistance exists. Therefore, a modification toward the existing fabrication is needed to overcome the problem of the increment in titanium silicide sheet resistance.